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LM94 bảng dữ liệu(PDF) 16 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
tên linh kiện LM94
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LM94 bảng dữ liệu(HTML) 16 Page - National Semiconductor (TI)

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13.0 Registers (Continued)
Lock
Register Name
Address
Description
SETUP REGISTERS
x
Step 6 Temp Offset
D8h
Step 6 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 7 Temp Offset
D9h
Step 7 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 8 Temp Offset
DAh
Step 8 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 9 Temp Offset
DBh
Step 9 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 10 Temp Offset
DCh
Step 10 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 11 Temp Offset
DDh
Step 11 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 12 Temp Offset
DEh
Step 12 LUT 1/2 and LUT 3/4 Offset Temperatures
x
Step 13 Temp Offset
DFh
Step 13 LUT 1/2 and LUT 3/4 Offset Temperatures
TACH to PWM Binding
E0h
Controls the tachometer input to PWM output binding
x
Tach Boost Control
E1h
Controls the fan boost function upon a tach error
x
LM94 Status/Control
E2h
Gives Master error status, ASF reset control and Max PWM
control
x
LM94 Configuration
E3h
Configures various outputs and provides START bit
SLEEP STATE CONTROL AND MASK REGISTERS
Sleep State Control
E4h
Used to communicate the system sleep state to the LM94
S1 GPI Mask
E5h
Sleep state S1 GPI error mask register
S1 Fan Mask
E6h
Sleep state S1 fan tach error mask register
S3 GPI Mask
E7h
Sleep state S3 GPI error mask register
S3 Fan Mask
E8h
Sleep state S3 fan tach error mask register
S3 Temperature/Voltage Mask
E9h
Sleep state S3 temperature or voltage error mask register
S4/5 GPI Mask
EAh
Sleep state S4/5 GPI error mask register
S4/5 Temperature/Voltage Mask
EBh
Sleep state S4/5 temperature or voltage error mask register
OTHER MASK REGISTERS
GPI Error Mask
ECh
Error mask register for GPI faults
Miscellaneous Error Mask
EDh
Error mask register for VRDx_HOT, GPI, and dynamic Vccp
limit checking.
ZONE 1a AND 2a TEMPERATURE READING ADJUSTMENT REGISTERS
Zone 1a Temp Adjust
EEh
Allows all Zone 1a temperature measurements to be adjusted
by a programmable offset
Zone 2a Temp Adjust
EFh
Allows all Zone 2a temperature measurements to be adjusted
by a programmable offset
BLOCK COMMANDS
Block Write Command
F0h
SMBus Block Write Command Code
Block Read Command
F1h
SMBus Block Write/Read Process call
Fixed Block 0
F2h
Fixed block code address 40h, size 8 bytes
Fixed Block 1
F3h
Fixed block code address 48h, size 8 bytes
Fixed Block 2
F4h
Fixed block code address 50h, size 6 bytes
Fixed Block 3
F5h
Fixed block code address 56h, size 16 bytes
Fixed Block 4
F6h
Fixed block code address 67h, size 4 bytes
Fixed Block 5
F7h
Fixed block code address 6Eh, size 8 bytes
Fixed Block 6
F8h
Fixed block code address 78h, size 12 bytes
Fixed Block 7
F9h
Fixed block code address 90h, size 32 bytes
Fixed Block 8
FAh
Fixed block code address B4h, size 8 bytes
Fixed Block 9
FBh
Fixed block code address C8h, size 8 bytes
Fixed Block 10
FCh
Fixed block code address D0h, size 16 bytes
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