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PIC16F87-I/ML bảng dữ liệu(PDF) 138 Page - Microchip Technology |
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PIC16F87-I/ML bảng dữ liệu(HTML) 138 Page - Microchip Technology |
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138 / 214 page  PIC16F87/88 DS30487B-page 136 Preliminary 2003 Microchip Technology Inc. TXREG 0000 0000 0000 0000 uuuu uuuu RCREG 0000 0000 0000 0000 uuuu uuuu ADRESH xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 0000 00-0 0000 00-0 uuuu uu-u OPTION 1111 1111 1111 1111 uuuu uuuu TRISA 1111 1111 1111 1111 uuuu uuuu TRISB 1111 1111 1111 1111 uuuu uuuu PIE1 -000 0000 -000 0000 -uuu uuuu PIE2 00-0 ---- 00-0 ---- uu-u ---- PCON ---- --qq ---- --uu ---- --uu OSCCON -000 0000 -000 0000 -uuu uuuu OSCTUNE --00 0000 --00 0000 --uu uuuu PR2 1111 1111 1111 1111 1111 1111 SSPADD 0000 0000 0000 0000 uuuu uuuu SSPSTAT 0000 0000 0000 0000 uuuu uuuu TXSTA 0000 -010 0000 -010 uuuu -u1u SPBRG 0000 0000 0000 0000 uuuu uuuu ANSEL -111 1111 -111 1111 -111 1111 CMCON 0000 0111 0000 0111 uuuu u111 CVRCON 000- 0000 000- 0000 uuu- uuuu WDTCON ---0 1000 ---0 1000 ---u uuuu ADRESL xxxx xxxx uuuu uuuu uuuu uuuu ADCON1 0000 ---- 0000 ---- uuuu ---- EEDATA xxxx xxxx uuuu uuuu uuuu uuuu EEADR xxxx xxxx uuuu uuuu uuuu uuuu EEDATH --xx xxxx --uu uuuu --uu uuuu EEADRH ---- -xxx ---- -uuu ---- -uuu EECON1 x--x x000 u--x u000 u--u uuuu EECON2 ---- ---- ---- ---- ---- ---- TABLE 15-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Power-on Reset, Brown-out Reset MCLR Reset, WDT Reset Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition, r = reserved, maintain clear Note 1: One or more bits in INTCON, PIR1 and PR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 15-3 for RESET value for specific condition. |
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