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PIC16F87-I/ML bảng dữ liệu(PDF) 131 Page - Microchip Technology

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PIC16F87-I/ML bảng dữ liệu(HTML) 131 Page - Microchip Technology

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 2003 Microchip Technology Inc.
Preliminary
DS30487B-page 129
PIC16F87/88
15.0
SPECIAL FEATURES OF THE
CPU
These devices have a host of features intended to max-
imize system reliability, minimize cost through elimina-
tion of external components, provide power saving
operating modes and offer code protection:
• RESET
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
• Interrupts
• Watchdog Timer (WDT)
• Two-Speed Start-up
• Fail-Safe Clock Monitor
• SLEEP
• Code Protection
• ID Locations
• In-Circuit Serial Programming™ (ICSP™)
There are two timers that offer necessary delays on
power-up. One is the Oscillator Start-up Timer (OST),
intended to keep the chip in RESET until the crystal
oscillator is stable. The other is the Power-up Timer
(PWRT), which provides a fixed delay of 72 ms (nomi-
nal) on power-up only. It is designed to keep the part in
RESET while the power supply stabilizes, and is
enabled or disabled using a configuration bit. With
these two timers on-chip, most applications need no
external RESET circuitry.
SLEEP mode is designed to offer a very low current
Power-down mode. The user can wake-up from
SLEEP through external RESET, Watchdog Timer
Wake-up, or through an interrupt.
Additional information on special features is available
in the PICmicro® Mid-Range Reference Manual
(DS33023).
15.1
Configuration Bits
The configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select vari-
ous device configurations. These bits are mapped in
program memory locations 2007h and 2008h.
The user will note that address 2007h is beyond the
user program memory space, which can be accessed
only during programming.



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