CC2430-RTR1-F128Z datasheet(33/234 Pages) TI

tên linh kiện	CC2430-RTR1-F128Z

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CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 33 of 232

12.3.1 Memory Map

This section gives an overview of the memory

map.

The memory map differs from the standard

8051 memory map in two important aspects,

as described below.

First, in order to allow the DMA controller

access to all physical memory and thus allow

DMA transfers between the different 8051

memory spaces, parts of SFR and CODE

memory space is mapped into the XDATA

memory space.

Secondly, the CODE memory space mapping

can be selected so that all physical memory is

mapped to CODE space, by using a unified

mapping of the CODE memory space.

Details about mapping of all 8051 memory

spaces are given in the next section.

The memory map showing how the different

physical memories are mapped into the CPU

memory spaces is given in the figures on the

following pages for each flash memory size

option.

Note that for CODE memory space, the two

possible memory maps are shown; unified and

non-unified mapping.

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