MCDP6000 datasheet(21/46 Pages) ETC1

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MCDP6000

USB Type-C DP Alt-Mode Switching Retimer

3.9.3. TWI Programmable Mode

The MCDP6000 operation mode should be controlled through the TWI programming interface in default. The

default state after the power-on is the USB 3.2 x1 Only mode. The MCDP6000 changes its state according

to the directives from the policy engine through TWI.

3.9.4. Stand-Alone Mode

The MCDP6000 also provides the three configuration pins for its operation mode. By enabling this feature

through TWI, P_POL and P_CONF0/1 pins can be used to determine the operating mode. These pins

provide the controllability for the USB Type-C plug orientation and the pin assignment to users. The function

of P_POL and P_CONF0/1 is shown in the table below.

Note:

P_POL, P_CONF0 and P_CONF1 I/Os are designed to operate under 1.8 V in nominal case.

Connecting these I/O with 3.3 V output buffer would cause damage.

3.9.5. Low Power Mode

The MCDP6000 enters into the low power mode when P_CONF0/1 is

set to 2’b00. Upon the power-up,

P_CONF should be 2’b00 for the lowest power consumption. Only P_CONF, P_POL, the TWI slave and the

programmed through the TWI for any required changes in the configuration of low power mode. When the

operating mode changes from other states to the low power mode, the MCDP6000 goes through the reset

cycle except for the register bank in always power-on domain.

The far-end termination detection of USB 3.2 x1 is not performed in the low power mode. In addition, the

receiver termination is not present; for example, the high impedance is present on the transmitter channel,

so that the USB link partner recognizes the missing USB link connection.

3.9.6. USB 3.2 x1 Retimer Operation

The MCDP6000 enters USB 3.2 x1-only mode during power-on-reset. Otherwise, the MCDP6000 enables

the USB 3.2 x1

retimer when P_CONF0 is set to 1’b1.

The MCDP6000 starts far-end termination detection upon the activation of the USB 3.2 x1 retimer until the

receiver termination on the link partner is detected. Unless the MCDP6000 is directed to transit to the low

power state via P_CONF pins or detects the far-end receiver termination, the MCDP6000 stays in the

RX.detect state as described in the USB 3.2 x1 standard.

The MCDP6000 operates as BLR (Bit-Level Retimer) in SS mode and as SRIS (Separate Reference Clock

Independent SSC) in SSP mode.

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