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VRD312 bảng dữ liệu(PDF) 42 Page - Microchip Technology |
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VRD312 bảng dữ liệu(HTML) 42 Page - Microchip Technology |
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42 / 416 page ![]() PIC24FJ256GA705 FAMILY DS30010118D-page 42 2016-2018 Microchip Technology Inc. FIGURE 4-1: PROGRAM SPACE MEMORY MAP FOR PIC24FJ256GA705 DEVICES TABLE 4-1: PROGRAM MEMORY SIZES AND BOUNDARIES(2) Device Program Memory Upper Boundary (Instruction Words) Write Blocks(1) Erase Blocks(1) PIC24FJ256GA70X 02AFFEh (88,064 x 24) 1376 172 PIC24FJ128GA70X 015FFEh (45,056 x 24) 704 88 PIC24FJ64GA70X 00AFFEh (22,528 x 24) 352 44 Note 1: One Write Block = 128 Instruction Words; One Erase Block (Page) = 1024 Instruction Words. 2: To maintain integer page sizes, the memory sizes are not exactly half of each other. 000000h FA00FEh FA0100h FEFFFEh FFFFFFh Flash Write Latches DEVID (2) Reserved FF0000h F9FFFEh FA0000h 800000h 7FFFFFh Reserved Flash Config Words 0xxx00h(1) 0xxxFEh(1) Unimplemented Read ‘0’ User Flash Program Memory 801800h Reserved FF0004h Reserved Executive Code Memory 800FFEh 800100h Customer OTP Memory 8017FEh 801700h Reserved 801000h 8016FEh Legend: Memory areas are not shown to scale. Note 1: Exact boundary addresses are determined by the size of the implemented program memory (Table 4-1). |
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