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ESP32-S3 bảng dữ liệu(PDF) 29 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32-S3 bảng dữ liệu(HTML) 29 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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29 / 69 page ![]() 3 Functional Description 3.2 RTC and Low-Power Management 3.2.1 Power Management Unit (PMU) With the use of advanced power-management technologies, ESP32-S3 can switch between different power modes. • Active mode: CPU and chip radio are powered on. The chip can receive, transmit, or listen. • Modem-sleep mode: The CPU is operational and the clock speed can be reduced. The wireless baseband and radio are disabled, but wireless connection can remain active. • Light-sleep mode: The CPU is paused. The RTC peripherals, as well as the ULP coprocessor can be woken up periodically by the timer. Any wake-up events (MAC, host, RTC timer, or external interrupts) will wake up the chip. Wireless connection can remain active. Users can optionally decide what peripherals to shut down/keep on (refer to Figure 0-1), for power-saving purpose. • Deep-sleep mode: CPU and most peripherals are powered down. Only the RTC memory is powered on and RTC peripherals are optional. Wi-Fi connection data are stored in the RTC memory. The ULP coprocessor is functional. For power consumption in different power modes, please refer to Table 4-8. 3.2.2 Ultra-Low-Power Coprocessor The ULP coprocessor is designed as a simplified, low-power replacement of CPU in sleep modes. It can be also used to supplement the functions of the CPU in normal working mode. The ULP coprocessor and RTC memory remain powered on during the Deep-sleep mode. Hence, the developer can store a program for the ULP coprocessor in the RTC slow memory to access RTC GPIO, RTC peripheral devices, RTC timers and internal sensors in Deep-sleep mode. ESP32-S3 has two ULP coprocessors, one based on RISC-V instruction set architecture (ULP-RISC-V) and the other on finite state machine (ULP-FSM). The clock of the coprocessors is the internal fast RC oscillator. ULP-RISC-V has the following features: • Support for RV32IMC instruction set • Thirty-two 32-bit general-purpose registers • 32-bit multiplier and divider • Support for interrupts • Booted by the CPU, its dedicated timer, or RTC GPIO ULP-FSM has the following features: • Support for common instructions including arithmetic, jump, and program control instructions • Support for on-board sensor measurement instructions • Booted by the CPU, its dedicated timer, or RTC GPIO Note that these two coprocessors cannot work simultaneously. Espressif Systems 29 Submit Documentation Feedback ESP32-S3 Series Datasheet v1.3 |
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