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ESP32-S2 bảng dữ liệu(PDF) 21 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32-S2 bảng dữ liệu(HTML) 21 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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21 / 51 page ![]() 3 Functional Description 3.2.1 CPU Clock The CPU clock has four possible sources: • external 40 MHz crystal clock • internal 8 MHz oscillator • PLL clock • audio PLL clock The application can select the clock source from the external crystal clock source, the PLL clock, the audio PLL clock, or the internal 8 MHz oscillator. The selected clock source drives the CPU clock directly, or after division, depending on the application. Note: ESP32-S2 is unable to operate without an external crystal clock. 3.2.2 RTC Clock The RTC slow clock has three possible sources: • external low-speed (32 kHz) crystal clock • internal RC oscillator (typically about 90 kHz, and adjustable) • internal 31.25 kHz clock (derived from the internal 8 MHz oscillator divided by 256) The RTC fast clock has two possible sources: • external divide-by-4 crystal clock • internal divide-by-N oscillator of 8 MHz The RTC slow clock is used for RTC counter, RTC watchdog and low-power controller; while the RTC fast clock for RTC peripherals and sensing controllers. 3.2.3 Audio PLL Clock The audio clock is generated by the low-noise fractional-N PLL. 3.3 Analog Peripherals 3.3.1 AnalogtoDigital Converter (ADC) ESP32-S2 integrates two 13-bit SAR ADCs and supports measurements on 20 channels (analog-enabled pins). The ULP-coprocessor in ESP32-S2 is also designed to measure voltage. The ULP can operate while the main CPU is in Deep-sleep mode, which lowers the total power consumption. By using threshold settings, and / or via other triggers or events, we can interrupt the CPU from the sleep state. The ADCs can be configured to measure voltage on up to 20 pins. For ADC characteristics, please refer to Table 12. Espressif Systems 21 Submit Documentation Feedback ESP32-S2 Series Datasheet v1.4 |
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