FXLS8964AFR3 datasheet(22/98 Pages) NXP

22 / 98 page

NXP Semiconductors

FXLS8964AF

3-Axis Low-g Accelerometer

Mode[1]

I2C/SPI

bus state

VDD

Description

Hibernate[2] Unavailable

≥ 1.71 V

The wake-up detection circuit is active, but all other analog and digital blocks are

disabled to minimize the current drawn on the VDD pin. I2C and SPI interfaces are

not available, and all previously written register settings are lost.

BT_MODE = GND:

The host must toggle the SPI_CS_B / WAKE-UP pin (low-to-high or high-to-

low) in order to initiate a transition back into Standby mode before attempting

communications with the device. The host must wait TBOOT1 ms for the boot

process to complete.

BT_MODE = VDD:

The INT1/MOT_DET pin is set high (level sensitive) through an external pull-

up resistor; the device then exits Hibernate mode and starts the BOOT process.

The host must wait TBOOT2 ms for the boot process to complete and the motion

detection process to begin. Communication with the device over the I2C or SPI

interfaces is possible after the BOOT process completes.

Standby

Available

≥ 1.71 V

Sensor and analog blocks are disabled;

I2C and SPI interfaces are available.

Active[3][4]

(WAKE/

SLEEP)

Available

≥ 1.71 V

Sensor and analog blocks are enabled when needed (power cycled). I2C and SPI

interfaces are available.

BT_MODE = GND:

FXLS8964AF can automatically transition between the Active SLEEP and WAKE

sub-modes when activity/inactivity is detected. Setting

ASLP_COUNT ≥ 1 enables

the Auto-WAKE/SLEEP mode.

BT_MODE = VDD:

The Auto-WAKE/SLEEP function is not typically used in this mode (defaults to

disabled), but the host may enable Auto-WAKE/SLEEP by configuring it through

the register interface.

Active[5]

(EXT_TRIG)

Available

≥ 1.71 V

All blocks are enabled when needed (power cycled). I2C and SPI interfaces are

able to respond to read and write commands.

BT_MODE = GND:

SENS_CONFIG4[INT2_FUNC] = 1

FXLS8964AF automatically transitions between EXT_TRIG and Active mode upon

receiving a trigger signal (low-to-high transition) on the EXT_TRIG/INT2 pin. Once

the measurement cycle has completed, FXLS8964AF automatically transitions

back to the EXT_TRIG state and waits for the next trigger event.

BT_MODE = VDD:

External trigger mode is not available;

SENS_CONFIG4 [INT2_FUNC] shall not

be written to with any value other than 0.

Table 15. FXLS8964AF operating modes descriptions...continued

[1]

All register contents are preserved when transitioning from Active to Standby mode. Some registers are reset when transitioning from Standby to Active.

The behavior of all registers is noted in Table 20.

[2]

Exiting Hibernate mode causes all register settings to initialize to their default values. Entering Hibernate mode is equivalent to removing the VDD supply;

the device state, sensor data, and host programmed register contents are lost when this mode is entered.

[3]

The SLEEP and WAKE modes are Active measurement modes. For more information on how to use the SLEEP and WAKE modes and how to transition

between these modes, see Table 16.

[4]

The SLEEP and WAKE modes each feature independent power mode and ODR settings for the HPM and LPM modes. FPM may also be independently

enabled for either WAKE or SLEEP modes, allowing for user programmable idle times and measurement decimation factors. These features allow for the

creation of custom ODRs and also realizing the optimal trade-off between resolution (noise) and power dissipation in a given application or use case.

[5]

The EXT_TRIG mode may be used to synchronize the collection of acceleration and temperature data with an external system, or to create custom ODRs

using an MCU output compare/PWM/GPIO pin.

FXLS8964AF

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.4 — 7 December 2021

22 / 98

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