25CSM04T-ISLASHCS0668 datasheet(29/55 Pages) MICROCHIP

29 / 55 page

 2019-2022 Microchip Technology Inc. and its subsidiares

DS20005817D-page 29

25CSM04

9.0

SECURITY REGISTER

The Security register is segmented into one 256-byte

read-only page and one 256-byte user-programmable

lockable ID page. The user-programmable lockable ID

page supports both byte write and page write

sequences. The user-programmable lockable ID page

may be permanently locked at any time with the LOCK

instruction. The Security register lock state can be

verified at any time with CHLK instruction.

9.1

Reading from the Security

Reading the Security register contents from 25CSM04

follows a similar sequence to reading the EEPROM but

a different opcode and specific address data is

required. To read the Security register, first drive the CS

low to select the device, then send the RDEX (83h)

instruction via the SI line followed by the 24-bit address

to be read.

Upon completion of the 24-bit address, any data on the

SI line will be ignored. The data (D7 – D0) at the

specified address is then shifted out onto the SO line. If

only one byte is to be read, the CS line should be driven

high after the data comes out. The read sequence can

be continued since the byte address is automatically

incremented and data will continue to be shifted out.

When the highest address is reached (0001FFh), the

address counter will “rollover” to the lowest address

(000000h) allowing the entire Security register to be

read in one continuous read cycle regardless of the

starting address.

FIGURE 9-1:

READ SECURITY REGISTER (RDEX) SEQUENCE

TABLE 9-1:

SECURITY REGISTER ORGANIZATION

Security Register Byte Number

...

254

255

256

257

...

510

511

Factory-Programmed (Read-only)

0-15: Device Serial Number

16-255: Reserved for Future Use

User-Programmable (Lockable)

Note:

Address bits A23 through A9 are “don’t

care” bits, except A10 which must be a

logic ‘0’.

SCK

2 3 4

567

910 11 12

40 41

10 0 0 00 11

A A A

RDEX Opcode (83h)

Address Bits A23-A0(1)

XX XX X X

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6

Data Byte 1

MSb

High-Impedance

Note 1: Address bit A10 must be ‘0’ to read the Security register.

25CSM04T-I/CS0668 bảng dữ liệu(PDF) 29 Page - Microchip Technology

25CSM04T-I/CS0668 bảng dữ liệu(HTML) 29 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

bảng dữ liệu tải về

Link URL