CBTU4411EE datasheet(2/21 Pages) NXP

2 / 21 page

CBTU4411

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Product data sheet

Rev. 4 — 18 June 2012

2 of 21

NXP Semiconductors

CBTU4411

11-bit DDR2 SDRAM MUX/bus switch with 12

Ω ON resistance

Features and benefits

 Enable (EN) and select signals (S0, S1) are SSTL_18 compatible

 Optimized for use in Double Data Rate 2 (DDR2) SDRAM applications

 Suitable to be used with 400 Mbit/s to 800 Mbit/s, 200 MHz to 400 MHz DDR2 data

bus

 Switch ON-resistance is designed to eliminate the need for series resistor to DDR2

SDRAM

 12

Ω ON-resistance

 Controlled enable/disable times support fast bus turnaround

 Pseudo-differential select inputs support accurate and low-skew control of switching

times

 Selectable built-in termination resistors on the Sn inputs

 Internal 400

Ω pull-down resistors on xDPn port

 VBIAS input for optimal DIMM-port pull-down when disabled

 Configurable to support differential strobe with pull-up to 3⁄4 of VDD on channel 10

when idle

 Low differential skew

 Matched rise/fall slew rate

 Low crosstalk data-data/data-DQM

 Simplified 1 : 4 switch position control by 2-bit encoded input

 Single input pin puts all bus switches in OFF (high-impedance) position

 Latch-up protection exceeds 500 mA per JESD78

 ESD protection exceeds 1500 V HBM per JESD22-A114 and 750 V CDM per

JESD22-C101

Ordering information

Table 1.

Ordering information

Tamb =0

°C to +85 °C.

Type number

Package

Name

Description

Version

CBTU4411EE

LFBGA72

plastic low profile fine-pitch ball grid array package;

72 balls; body 7

× 7 × 1.05 mm

SOT856-1

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