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CBTL05024 bảng dữ liệu(PDF) 7 Page - NXP Semiconductors |
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CBTL05024 bảng dữ liệu(HTML) 7 Page - NXP Semiconductors |
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7 / 21 page ![]() CBTL05024 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 — 27 March 2014 7 of 21 NXP Semiconductors CBTL05024 High performance MUX/deMUX switch for Thunderbolt applications 6. Functional description Refer to Figure 1 “Block diagram of CBTL05024”. The following sections describe the individual block functions and capabilities of the device in more detail. 6.1 Buffer function tables 6.2 AUX MUX function table 6.3 Operation modes of both DPML MUX and TB MUX [1] HPD must be LOW during Test mode. Table 4. HPD buffer HPD input HPDOUT output 00 11 Table 5. CA_DET buffer CA_DET input CA_DETOUT output 00 11 Table 6. 2 : 1 AUX MUX function CA_DET input AUXIO 0AUX 1 DDC Table 7. Operation modes AUXIO_EN TB_ENA DP_PD CA_DET AUXIO DPMLO Modes R3 R2 0 X 0 X 3-state 3-state DP Standby mode ON ON 0 X 1 X 3-state LS Standby mode ON ON 1 0 0 0 AUX input DP input DP mode ON ON 1 0 0 1 DDC DP input DP++ mode ON ON 1 0 1 X 3-state LS Detect mode ON ON 1 1 01TB DP input Test mode[1] OFF ON 1 1 0 0 3-state 3-state Sleep mode OFF ON 1 1 1 X TB LS TB mode OFF ON |
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