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ADM6821 bảng dữ liệu(PDF) 4 Page - Analog Devices

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ADM6821 bảng dữ liệu(HTML) 4 Page - Analog Devices

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ADM6821–ADM6825
Preliminary Technical Data
Rev.PrA | Page 4 of 7
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
1
2
34
5
ADM6822/
ADM6823
TOP VIEW
(Not to Scale)
VCC
RESET
GND
MR
WDI
1
2
34
5
ADM6821
TOP VIEW
(Not to Scale)
VCC
RESET
GND
MR
WDI
1
2
34
5
ADM6824
TOP VIEW
(Not to Scale)
VCC
RESET
GND
RESET
WDI
1
2
34
5
ADM6825
TOP VIEW
(Not to Scale)
VCC
RESET
GND
RESET
MR
Table 4. Pin Functional Descriptions
Pin No.
Name
Description
1
RESET (ADM6822/23/24/25)
Active-Low Reset Output, which is asserted whenever VCC is below the reset.threshold,
VTH.
Open-Drain Output Stage for ADM6822.
Push-Pull Output Stage for ADM6823/24/25.
RESET (ADM6821)
Active-High Reset Output
2
GND
Ground
3
MR (ADM6821/22/23)
Manual Reset Input. This is an active-low input which, when forced low for at least 1µs,
generates a reset.
Features a 52k
internal pull-up.
RESET (ADM6824/ADM6825)
Active-High Push-Pull Reset Output.
4
WDI (ADM6821/22/23/24)
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the
duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this
pin or if a reset is generated.
MR (ADM6825)
Manual Reset Input.
5
VCC
Power Supply Voltage being Monitored
ESD CAUTION
`
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.



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