PS10 datasheet(2/13 Pages) SUTEX

2 / 13 page

PS10/PS11

A051204

*Absolute Maximum Ratings are those values beyond which damage to the device may

occur. Functional operation under these conditions is not implied. Continuous operation of

the device at the absolute rating level may affect device reliability. All voltages are refer-

enced to device ground.

Ordering Information

Package Options

Active State of Power

Good Flags

14 Pin SOIC

High

PS10NG

Low

PS11NG

Absolute Maximum Ratings*

VEE referenced to VIN pin

+0.3V to -100V

VPWRGD referenced to VEE voltage

-0.3V to +100V

VUV and VOV referenced to VEE Voltage

-0.3V to 12V

Operating Ambient Temperature

-40°C to +85°C

Operating Junction Temperature

-40°C to +125°C

Storage Temperature Range

-65° to +150°C

Power Dissipation @ 25

°C, 14-Pin SOIC

750mW

Electrical Characteristics (-10V ≤ V

IN ≤ -90V, TA = 25°C unless otherwise specified)

Symbol

Parameter

Min

Typ

Max

Units

Conditions

Supply (Referenced to VIN pin)

VEE

Supply Voltage

-90

-10

IEE

Supply Current

400

450

µA

VEE = -48V

OV and UV Control (Referenced to VEE pin)

VUVH

UV High Threshold

1.16

1.22

1.28

Low to High Transition

VUVL

UV Low Threshold

1.06

1.12

1.18

High to Low Transition

VUVHY

UV Hysteresis

100

IUV

UV Input Current

1.0

VUV = VEE + 1.9V

VOVH

OV High Threshold

1.16

1.22

1.28

Low to High Transition

VOVL

OV Low Threshold

1.06

1.12

1.18

High to Low Transition

VOVHY

OV Hysteresis

100

IOV

OV Input Current

1.0

VUV = VEE + 1.9V

#Specifications apply over 0°C ≤ TA ≤ 70°C

Power Good Timing (Test Conditions: CRAMP = 10nF, VUV = VEE + 1.9V, VOV = VEE + 0.5V)

IRAMP

Ramp Pin Output Current

µA

tPWRGD-A

Time from UV High to PWRGD-A

8.8

VEE = -48V, CRAMP = 10nF,

see Typical Application Cir-

cuit

tPWRGD-B

Maximum time from PWRGD-A to PWRGD-B

150

200*

250

RTB = 120k

Ω

tPWRGD-B

Minimum time from PWRGD-A to PWRGD-B

3.0

5.0*

8.0

RTB = 3k

Ω

tPWRGD-C

Maximum time from PWRGD-B to PWRGD-C

150

200*

250

RTC = 120k

Ω

tPWRGD-C

Minimum time from PWRGD-B to PWRGD-C

3.0

5.0*

8.0

RTC = 3k

Ω

tPWRGD-D

Maximum time from PWRGD-C to PWRGD-D

150

200*

250

RTD = 120k

Ω

tPWRGD-D

Minimum time from PWRGD-C to PWRGD-D

3.0

5.0*

8.0

RTD = 3k

Ω

*Note: Variations will track. For example if tPWRGD-A is 250ms then so will be tPWRGD-B/C/D. Contact factory for tighter tolerance version.

Power Good Outputs (Test Conditions: VUV = VEE + 1.9V, VOV = VEE + 0.5V)

VPWRGD-x(hi)

Power Good Pin Breakdown Voltage

PWRGD-x = HI Z

VPWRGD-x(lo)

Power Good Pin Output Low Voltage

0.4

0.5

IPWRGD = 1mA, PWRGD-x = LOW

IPWRGD-x(lk)

Maximum Leakage Current

<1.0

µA

VPWRGD = 90V, PWRGD-x = HI Z

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