HV9930P-G datasheet(2/7 Pages) SUTEX

2 / 7 page

A090805

HV9930

Ordering Information

Package Options

Device

8 pin SOIC

8 pin DIP

HV9930

HV9930LG-G

HV9930P-G

-G indicates package is RoHS compliant ‘Green’

Absolute Maximum Ratings

IN to GND……………………………….

-0.5V to +200V

DD to GND……………………………..

-0.3V to +13.5V

CS1, CS2 to GND……………………….. -0.3V to V

DD + 0.3V

PWMD to GND…………………………… -0.3V to (V

DD + 0.3V)

GATE to GND…………………………….. 0.3V to (V

DD + 0.3V)

Continuous Power Dissipation (TA = +25°C) (Note 1)

8-Pin DIP (derate 9mW/°C above +25°C)….....…. 900mW

8-Pin SO (derate 6.3mW/°C above 25°C)……….. 630mW

Operating Temperature Range ...............….-40°C to +85°C

Junction Temperature..................................+125°C

Storage Temperature Range .......................-65°C to +150°C

Stresses beyond those listed under ‘‘Absolute Maximum Ratings’’ may cause

permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond

those indicated in the operational sections of the specifications is not

implied. Exposure to absolute maximum rating conditions for extended

periods may affect device reliability.

Electrical Characteristics

(The * denotes the specifications which apply over the full operating junction temperature range of 0

°C < T

A < +85°C, otherwise the specifications are

at TA = 25°C, VDD = 7.5V, unless otherwise noted)

Symbol

Description

Min

Typ

Max

Units

Conditions

Input

VINDC

Input DC supply voltage range*

200

DC input voltage

IINsd

Shut-Down mode supply current*

0.5

PWM_D connected to GND,

VIN = 12V

Internal Regulator

VDD

Internally regulated voltage

7.0

7.5

9.0

VIN = 8–200V, IDD(ext) = 0,

GATE open

IDD(ext)

VDD current available for external

circuitry

1.0

VIN = 8–200V

UVLO

VDD under voltage lockout

threshold

6.45

6.7

6.95

VIN rising

∆UVLO

VDD under voltage lockout

hysteresis

500

VDD(ext)

Steady State external voltage

which can applied at the VDD pin

Reference

VREF

REF pin voltage*

1.212

1.25

1.288

REF bypassed with a 0.1

µF capacitor

to GND; IREF = 0;

VDD = 7.5V; PWMD = 5V

VREFLINE

Line regulation of reference voltage

REF bypassed with a 0.1

µF capacitor

to GND; IREF = 0;

VDD = 7 – 12V; PWMD = 5V

IREF

Reference Output current range

-0.01

1.0

REF bypassed with a 0.1

µF capacitor

to GND; VDD = 7 – 12V; PWMD = 5V

VREFLOAD

Load regulation of reference

voltage

REF bypassed with a 0.1

µF capacitor

to GND; IREF = 0 – 500µA;

VDD = 7.5; PWMD = 5V

PWM Dimming

VPWMD(lo)

PWMD input low voltage*

0.8

VIN = 10 - 200V

VPWMD(hi)

PWMD input high voltage*

2.4

VIN = 10 - 200V

RPWMD

PWMD pull-down resistance

100

150

Ω

VPWMD = 5V

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