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PCF8536AT bảng dữ liệu(PDF) 56 Page - NXP Semiconductors |
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PCF8536AT bảng dữ liệu(HTML) 56 Page - NXP Semiconductors |
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56 / 103 page ![]() PCA8530 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2 — 25 September 2014 56 of 103 NXP Semiconductors PCA8530 Automotive 102 x 4 Chip-On-Glass LCD segment driver 9. Bus interfaces 9.1 Control byte and register selection After initiating the communication over the bus and sending the slave address (I2C-bus, see Section 9.2) or subaddress (SPI-bus, see Section 9.3 on page 61), a control byte follows. The purpose of this byte is to indicate both, the content for the following data bytes (RAM or command) and to indicate that more control bytes will follow. Typical sequences could be: • Slave address/subaddress - control byte - command byte - command byte - command byte - end • Slave address/subaddress - control byte - RAM byte - RAM byte - RAM byte - end • Slave address/subaddress - control byte - command byte - control byte - RAM byte - end This allows sending a mixture of RAM and command data in one access or alternatively, to send just one type of data in one access. In this way, it is possible to configure the device and then fill the display RAM with little overhead. The display bytes are stored in the display RAM at the address specified by the data pointer. Table 42. Control byte description Bit Symbol Value Description 7CO continue bit 0 last control byte 1 control bytes continue 6 to 5 RS[1:0] register selection 00, 10 command register 01 RAM data 11 unused 4 to 0 - - unused Fig 32. Control byte format |
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