PCF21219DUGR datasheet(7/107 Pages) NXP

7 / 107 page

PCA2117

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Product data sheet

Rev. 4 — 8 April 2015

7 of 107

NXP Semiconductors

PCA2117

Automotive LCD driver for character displays

[1]

The substrate (rear side of the die) is at VSS1 potential and must not be connected.

[2]

If pin OSC is tied to VSS1, CLK is the output pin of the internal oscillator. If pin OSC is tied to VDD1, CLK is the input pin for the external

oscillator.

76 to 80

input

not accessible; must be connected to PWROUT

Oscillator, synchronization, and reset pins

OSC[2]

55, 56

input

clock (internal/external) selector

74, 75

input

power-down mode select

• for normal operation, pin PD must be LOW

• for power-down mode, pin PD must be HIGH

CLK

92 to 94

input/output

internal oscillator output, external oscillator input

RST

95, 96

input

active LOW reset input

Bus-related pins

SPI-bus

I2C-bus

SA0

57, 58

input

unused;

• connect to VSS1

slave address selector;

• connect to VSS1 for logic 0

• connect to VDD1 for logic 1

IFS

59, 60

input

interface selector input

• connect to VSS1

interface selector input

• connect to VDD1

90, 91

input

chip enable input (active LOW)

unused

• connect to VDD1

SDI/SDAIN

97 to 99

input

SPI-bus data input

I2C-bus serial data input

SDO

100, 101

output

SPI serial data output

unused

• must be left open

SCL

102 to 104

input

serial clock input

SDAOUT

105 to 109

output

unused

• must be connected to VSS1

serial data output

Table 3.

Pin description of PCA2117DUGx …continued

Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.

Symbol

Type

Description

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