PIC10F220 datasheet(29/78 Pages) MICROCHIP

29 / 78 page

Preliminary

DS41270B-page 27

PIC10F220/222

6.1.2

TIMER0 INCREMENT DELAY

Since the prescaler output is synchronized with the

internal clocks, there is a small delay from the time the

external clock edge occurs to the time the Timer0 mod-

ule is actually incremented. Figure 6-4 shows the delay

from the external clock edge to the timer incrementing.

FIGURE 6-4:

TIMER0 TIMING WITH EXTERNAL CLOCK

6.2

Prescaler

An 8-bit counter is available as a prescaler for the

Timer0 module or as a postscaler for the Watchdog

Timer (WDT), respectively (see Section 8.6 “Watch-

dog Timer (WDT)”). For simplicity, this counter is

being referred to as “prescaler” throughout this data

sheet.

The PSA and PS<2:0> bits (OPTION<3:0>) determine

prescaler assignment and prescale ratio.

When assigned to the Timer0 module, all instructions

writing

the

TMR0

(e.g.,

CLRF 1,

MOVWF 1,

BSF 1,x,

etc.) will clear the prescaler.

When assigned to WDT, a CLRWDT instruction will clear

the prescaler along with the WDT. The prescaler is

neither readable nor writable. On a Reset, the

prescaler contains all ‘0’s.

Increment Timer0 (Q4)

External Clock Input or

Q1 Q2 Q3 Q4

Timer0

T0 + 1

T0 + 2

Small pulse

misses sampling

External Clock/Prescaler

Output After Sampling

(3)

Prescaler Output (2)

(1)

Note 1: Delay from clock input change to Timer0 increment is 3TOSC to 7TOSC. (Duration of Q = TOSC).

Therefore, the error in measuring the interval between two edges on Timer0 input = ±4TOSC max.

2: External clock if no prescaler selected; prescaler output otherwise.

3: The arrows indicate the points in time where sampling occurs.

Note:

The prescaler may be used by either the

Timer0 module or the WDT, but not both.

Thus, a prescaler assignment for the

Timer0 module means that there is no

prescaler for the WDT and vice-versa.

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