5 Device Comparison Table

Device

Orderable Part Number

Rated Output Current

Junction Temperature Range

External Sync(1)

TLVM13620

TLVM13620RDHR

2 A

–40°C to 125°C

No

TLVM13630

TLVM13630RDHR

3 A

–40°C to 125°C

No

TLVM13640

TLVM13640RDLR

4 A

–40°C to 125°C

No

TLVM13660

TLVM13660RDLR

6 A

–40°C to 125°C

No

(1)

See the TPSM63602, TPSM63603, TPSM63604, and TPSM63606 for applications that require clock synchronization, an output

voltage above 6 V, spread-spectrum modulation for EMI mitigation or both.

6 Pin Configuration and Functions

VIN2

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

20

19

18

17

NC

EN

PG

RT

AGND

FB

VOUT2

VIN1

SW

CBOOT

RBOOT

VLDOIN

AGND

VCC

VOUT1

PGND

PGND

PGND

PGND

Figure 6-1. 20-Pin QFN RDL Package (Top View)

Table 6-1. Pin Functions

Pin

Type(1)

Description

Name

NO.

VIN1, VIN2

1, 16

P

Input supply voltage. Connect the input supply to these pins. Connect input capacitors between these

pins and PGND in close proximity to the device.

SW

2

O

Switch node. Do not place any external component on this pin or connect to any signal. The amount of

copper placed on this pin must be kept to a minimum to prevent issues with noise and EMI.

CBOOT

3

I/O

Bootstrap pin for the internal high-side gate driver. A 100-nF bootstrap capacitor is internally connected

from this pin to SW within the module to provide the bootstrap voltage. CBOOT is brought out to use in

conjunction with RBOOT to effectively lower the value of the internal series bootstrap resistance to adjust

the switch-node slew rate, if necessary.

RBOOT

4

I/O

External bootstrap resistor connection. Internal to the device, a 100-Ω bootstrap resistor is connected

between RBOOT and CBOOT. RBOOT is brought out to use in conjunction with CBOOT to effectively

lower the value of the internal series bootstrap resistance to adjust the switch-node slew rate, if

necessary.

VLDOIN

5

P

Input bias voltage. Input to the internal LDO that supplies the internal control circuits. Connect to an

output voltage point to improve efficiency. Connect an optional high-quality 0.1-μF to 1-μF capacitor from

this pin to ground for improved noise immunity. If the output voltage is above 12 V, connect this pin to

ground.

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TLVM13640

SLVSGJ7 – APRIL 2022

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