SSM3K341R

2

Characteristics

Drain-source voltage

Gate-source voltage

Drain current (DC)

Drain current (pulsed)

Power dissipation

Power dissipation

Single-pulse avalanche energy

Avalanche current

Channel temperature

Storage temperature

(t = 10 s)

(Note 1)

(Note 1), (Note 2)

(Note 3)

(Note 3)

(Note 4)

(Note 5)

(Note 5)

Symbol

Rating

60

±20

6

24

1.2

2.4

28.9

6

175

-55 to 175

Unit

V

A

W

mJ

A

�

Note:

Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the

significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even

if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum

ratings.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook

("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test

report and estimated failure rate, etc).

Note 1: Ensure that the channel temperature does not exceed 175 �.

Note 2: pulse width ≤ 1 ms, Duty ≤ 1 %

Note 5: The definitions of the absolute maximum channel and storage temperatures are qualified per AEC-Q101.

Note:

This transistor is sensitive to electrostatic discharge and should be handled with care.

Note:

The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables,

operators, soldering irons and other objects should be protected against anti-static discharge.

Note:

the board material, board area, board thickness and pad area. When using this device, be sure to take heat

dissipation fully into account.

2021-02-03

Rev.8.0

©2016-2021

Toshiba Electronic Devices & Storage Corporation