SiC652

www.vishay.com

Vishay Siliconix

S19-0329-Rev. A, 08-Apr-2019

2

Document Number: 77194

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

PINOUT CONFIGURATION

Fig. 2 - Pin Configuration

PIN CONFIGURATION

PIN NUMBER

NAME

FUNCTION

1PWM

PWM input

2

ZCD_EN#

The ZCD_EN# pin enables or disables diode emulation. When ZCD_EN# is LOW, diode emulation is

allowed. When ZCD_EN# is HIGH, continuous conduction mode is forced. ZCD_EN# can also be put

in a high impedance mode by floating the pin. If ZCD_EN# is floating, the device is enabled

3

N.C.

Not connected

5

BOOT

High side driver bootstrap voltage

4, 32

Analog ground

Over current protection input voltage, connect this pin to power stage input voltage

7

PHASE

Return path of high side gate driver

8 to 11, 34

Power stage input voltage. Drain of high side MOSFET

12 to 15, 28, 35

Power ground

16 to 26

Phase node of the power stage

27, 33

GL

Low side MOSFET gate signal

29

Supply voltage

30

Temperature monitor output, FAULT flag output

31

DSBL#

Disable input, active low

ORDERING INFORMATION

PART NUMBER

PACKAGE

MARKING CODE

OPTION

SiC652CD-T1-GE3

PowerPAK MLP55-31L

SiC652

5 V PWM optimized

SiC652ACD-T1-GE3

SiC652A

3.3 V PWM optimized

SiC652DB

Reference board

SiC652ADB

C

GND

BOOT

PHASE

V

IN

V

IN_S

PWM

ZCD_EN#

N.C.

Bottom view

Top view

2

1

4

3

6

5

8

7

C

GND

BOOT

PHASE

V

IN

V

IN_S

PWM

ZCD_EN#

N.C.

2

1

4

3

6

5

8

7

15

14

13

12

11

10

915 14 13 12

11 10

9

24 25 26 27 28 29 30 31

V

33

GL

V

V

V

V

V

V

V

23 V

SWH

22 V

SWH

21 V

SWH

20 V

SWH

19 V

SWH

16 V

SWH

18 V

SWH

17 V

SWH

35

P

GND

34

V

IN

32

C

GND

GL

24

25

26

27

28

29

30

31