AD9772A-EB datasheet(4/40 Pages) AD

4 / 40 page

AD9772A

Rev. C | Page 4 of 40

SPECIFICATIONS

DC SPECIFICATIONS

TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 0 V, DVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

RESOLUTION

Bits

DC ACCURACY1

Integral Linearity Error (INL)

±3.5

LSB

Differential Nonlinearity (DNL)

±2.0

LSB

Monotonicity (12-Bit)

Guaranteed over specified temperature range

ANALOG OUTPUT

Offset Error

−0.025

+0.025

% of FSR

Gain Error

Without Internal Reference

−2

±0.5

% of FSR

With Internal Reference

−5

±1.5

% of FSR

Full-Scale Output Current2

Output Compliance Range

−1.0

+1.25

Output Resistance

200

kΩ

Output Capacitance

REFERENCE OUTPUT

Reference Voltage

1.14

1.20

1.26

Reference Output Current3

μA

REFERENCE INPUT

Input Compliance Range

0.1

1.25

Reference Input Resistance (REFLO = 3 V)

MΩ

Small-Signal Bandwidth

0.5

MHz

TEMPERATURE COEFFICIENTS

Unipolar Offset Drift

ppm of FSR/°C

Gain Drift

Without Internal Reference

±50

ppm of FSR/°C

With Internal Reference

±100

ppm of FSR/°C

Reference Voltage Drift

±50

ppm/°C

POWER SUPPLY

AVDD

Voltage Range

3.1

3.3

3.5

Analog Supply Current (IAVDD)

Analog Supply Current in Sleep Mode (IAVDD)

4.3

DVDD

Voltage Range

3.1

3.3

3.5

Digital Supply Current (IDVDD)

CLKVDD, PLLVDD4 (PLLVDD = 3.3 V)

Voltage Range

3.1

3.3

3.5

Clock Supply Current (ICLKVDD + IPLLVDD)

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