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FS5502 bảng dữ liệu(PDF) 5 Page - NXP Semiconductors

tên linh kiện FS5502
Giải thích chi tiết về linh kiện  High voltage PMIC with multiple SMPS and LDO
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FS5502 bảng dữ liệu(HTML) 5 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
Symbol
Pin
Type
Description
SCL
10
D_IN
I2C bus
Clock input
SDA
11
D_IN/OUT
I2C bus
Bidirectional data line
n.c.
12
n.c.
Not connected pin
n.c.
13
n.c.
Not connected pin
n.c.
14
n.c.
Not connected pin
n.c.
15
n.c.
Not connected pin
VMON1
16
A_IN
Voltage monitoring input 1
VCOREMON
17
A_IN
VCORE monitoring input: Must be connected to BUCK1 output
voltage
PGOOD
18
D_OUT
Power good output
Active low
Pull up to VDDIO mandatory
RSTB
19
D_OUT
Reset output
Active low
The main function is to reset the MCU. Reset input voltage is
monitored to detect external reset and fault condition.
Pull up to VDDIO mandatory
FIN
20
D_IN
Frequency synchronization input
GND
21
GND
Ground
GND
22
GND
Ground
VDDIO
23
A_IN
Input voltage FOUT buffers
Allow voltage compatibility with MCU I/Os
FOUT
24
D_OUT
Frequency synchronization output
n.c.
25
n.c.
Not connected pin
n.c.
26
n.c.
Not connected pin
n.c.
27
GND
External pull down to GND
n.c.
28
n.c.
Not connected pin
n.c.
29
n.c.
Not connected pin
n.c.
30
n.c.
Not connected pin
n.c.
31
n.c.
Not connected pin
n.c.
32
n.c.
Not connected pin
INTB
33
D_OUT
Interrupt output
n.c.
34
n.c.
Not connected pin
n.c.
35
n.c.
Not connected pin
BUCK1_IN
36
A_IN
Low voltage BUCK1 input voltage
BUCK1_SW
37
A_OUT
Low voltage BUCK1 switching node
PSYNC
38
D_IN/OUT
Power synchronization input/output
BUCK1_FB
39
A_IN
Low voltage BUCK1 voltage feedback
n.c.
40
GND
External pull down to GND
PRE_COMP
41
A_IN
VPRE compensation network
PRE_CSP
42
A_IN
VPRE positive current sense input
Table 2. Pin description...continued
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
5 / 113



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