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PDM1-S bảng dữ liệu(PDF) 6 Page - CUI INC |
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PDM1-S bảng dữ liệu(HTML) 6 Page - CUI INC |
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6 / 7 page ![]() cui.com CUI Inc │ SERIES: PDM1-S │ DESCRIPTION: DC-DC CONVERTER date 07/01/2021 │ page 6 of 7 1. Output load requirement To ensure this module can operate efficiently and reliably, the minimum output load may not be less than 10% of the full load during operation. If the actual output power is low, connect a resistor at the output end in parallel to increase the load. 2. Recommended circuit If you want to further decrease the input/output ripple, you can increase the capacitance accordingly or choose capacitors with low ESR (see Figure 2 & Table 2). However, the capacitance of the output filter capacitor must be appropriate. If the capacitance is too high, a startup problem might arise. For every channel of the output, to ensure safe and reliable operation, the maximum capacitance must be less than the maximum capacitive load (see Table 3). APPLICATION NOTES Note: 1. Operation under minimum load will not damage the converter; however, they may not meet all specifications listed. 2. Max. capacitive load tested at input voltage range and full load. 3. All specifications measured at: Ta=25°C, humidity<75%, nominal input voltage and rated output load, unless otherwise specified. Single Vout (Vdc) Max. Capacitive Load (μF) Dual Vout (Vdc) Max. Capacitive Load1 (μF) 3.3 220 3.3 100 5 220 5 100 9 220 9 100 12 220 12 100 15 220 15 100 24 220 24 100 Figure 2 Table 2 Vin (Vdc) Cin (µF) Single Vo (Vdc) Cout (µF) Dual Vo (Vdc) Cout (µF) 3.3 4.7 3.3 10 ±3.3 4.7 5 4.7 5 10 ±5 4.7 9 2.2 9 2.2 ±9 1 12 2.2 12 2.2 ±12 1 15 2.2 15 1 ±15 0.47 24 1 24 1 ±24 0.47 Note: It’s not recommended to connect any external capacitors in applications with less than 0.5 watt output. Table 3 Note: 1. For each output. Single output Dual output Additional Resources: Product Page | 3D Model | PCB Footprint |
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