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STM32L010K4 bảng dữ liệu(PDF) 52 Page - STMicroelectronics

tên linh kiện STM32L010K4
Giải thích chi tiết về linh kiện  Value line ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, 16-Kbyte Flash memory, 2-Kbyte SRAM, 128-byte EEPROM, ADC
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Electrical characteristics
STM32L010F4/K4
52/91
DS12323 Rev 3
Table 29. Peripheral current consumption in run or Sleep mode(1)
Peripheral
Typical consumption, VDD = 3.0 V, TA = 25 °C
Unit
Range 1,
VCORE = 1.8 V
VOS[1:0] = 01
Range 2,
VCORE =1.5 V
VOS[1:0] = 10
Range 3,
VCORE =1.2 V
VOS[1:0] = 11
Low-power
sleep and run
APB1
WWDG
2.5
2
1.6
2
µA/MHz
(fHCLK)
LPUART1
8.3
7.2
5.4
7.2
I2C1
11
8.2
6.8
8.9
LPTIM1
14
11
8.7
11
TIM2
10.5
8.5
6.4
8.5
USART2
8.5
6.8
5.4
7.1
APB2
ADC1(2)
53.9
3.3
4
SPI1
4.5
3.5
2.9
3.6
TIM21
6.8
6.1
4.5
5.6
DBGMCU
1.7
1.7
1.1
1.4
SYSCFG
2.5
2.4
1.6
2.3
Cortex-M0+
I/O port
GPIOA
7.6
6.3
4.9
6.5
GPIOB
5.1
4.1
3.2
4
GPIOC
1.1
0.7
0.6
0.8
AHB
CRC
1.5
1
FLASH(3)
00
0
0
DMA1
5.3
4.2
3.5
4.8
All enabled
96
80
62
88
PWR
2.5
2
2
1
1. Data based on differential IDD measurement between all peripherals OFF an one peripheral with clock enabled, in the
following conditions: fHCLK = 32 MHz (range 1), fHCLK = 16 MHz (range 2), fHCLK = 4 MHz (range 3), fHCLK = 64 KHz (Low-
power run/sleep), fAPB1 = fHCLK, fAPB2 = fHCLK, default prescaler value for each peripheral. The CPU is in Sleep mode in
both cases. No I/O pins toggling. Not tested in production.
2. HSI oscillator is OFF for this measure.
3. These values correspond to the Flash memory configuration interface consumption, which is negligible. To assess true
Flash memory consumption, compare relevant figures, like for example Table 19 and Table 21.



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