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STM32L151XE bảng dữ liệu(PDF) 107 Page - STMicroelectronics

tên linh kiện STM32L151XE
Giải thích chi tiết về linh kiện  Ultra-low-power 32-bit MCU Arm®-based Cortex®-M3 with 512KB Flash, 80KB SRAM, 16KB EEPROM, LCD, USB, ADC, DAC
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32L151XE bảng dữ liệu(HTML) 107 Page - STMicroelectronics

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DS10002 Rev 10
107/136
STM32L151xE STM32L152xE
Electrical characteristics
114
Figure 29. Maximum dynamic current consumption on VREF+ supply pin during ADC
conversion
General PCB design guidelines
Power supply decoupling must be performed as shown in Figure 11. The applicable
procedure depends on whether VREF+ is connected to VDDA or not. The 100 nF capacitors
must be ceramic (good quality). They must be placed as close as possible to the chip.
ADC clock
Sampling (n cycles)
Conversion (12 cycles)
Iref+
300µA
700µA
MS36686V1
Table 57. Maximum source impedance RAIN max(1)
Ts
(µs)
RAIN max (kΩ)
Ts (cycles)
fADC=16 MHz(2)
Multiplexed channels
Direct channels
2.4 V < VDDA < 3.6 V 1.8 V < VDDA < 2.4 V 2.4 V < VDDA < 3.6 V 1.8 V < VDDA < 2.4 V
0.25
Not allowed
Not allowed
0.7
Not allowed
4
0.5625
0.8
Not allowed
2.0
1.0
9
1
2.0
0.8
4.0
3.0
16
1.5
3.0
1.8
6.0
4.5
24
3
6.8
4.0
15.0
10.0
48
6
15.0
10.0
30.0
20.0
96
12
32.0
25.0
50.0
40.0
192
24
50.0
50.0
50.0
50.0
384
1. Guaranteed by design.
2. Number of samples calculated for fADC = 16 MHz. For fADC = 8 and 4 MHz the number of sampling cycles can be reduced
with respect to the minimum sampling time Ts (µs),



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