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STM32F730V8 bảng dữ liệu(PDF) 93 Page - STMicroelectronics

tên linh kiện STM32F730V8
Giải thích chi tiết về linh kiện  Arm® Cortex®-M7 32b MCUFPU, 462DMIPS, 64KB Flash /256164KB RAM, USB OTG HS/FS, 18 TIMs, 3 ADCs, 21 com IF
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STM32F730V8 bảng dữ liệu(HTML) 93 Page - STMicroelectronics

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DS12536 Rev 2
93/202
STM32F730x8
Electrical characteristics
185
6.3.2
VCAP1/VCAP2 external capacitor
Stabilization for the main regulator is achieved by connecting an external capacitor CEXT to
the VCAP1/VCAP2 pins. CEXT is specified in Table 18.
Note:
The VCAP2 pin is not available on the LQFP64 package.
Figure 22. External capacitor CEXT
1. Legend: ESR is the equivalent series resistance.
6.3.3
Operating conditions at power-up / power-down (regulator ON)
Subject to general operating conditions for TA.
Table 20. Operating conditions at power-up / power-down (regulator ON)
4. The voltage range for USB full speed PHYs can drop down to 2.7 V. However the electrical characteristics of D- and D+
pins will be degraded between 2.7 and 3 V.
Table 18. VCAP1/VCAP2 operating conditions(1)
1. When bypassing the voltage regulator, the two 2.2 µF VCAP capacitors are not required and should be
replaced by two 100 nF decoupling capacitors.
Symbol
Parameter
Conditions
CEXT
Capacitance of external capacitor
2.2 µF
ESR
ESR of external capacitor
< 2
Ω
Table 19. VCAP1 operating conditions in the LQFP64 package(1)
1. When bypassing the voltage regulator, the 4.7 µF VCAP capacitor is not required and should be replaced
by two 100 nF decoupling capacitors.
Symbol
Parameter
Conditions
CEXT
Capacitance of external capacitor
4.7 µF
ESR
ESR of external capacitor
between 0.1
Ω and 0.2 Ω
MS19044V2
ESR
R Leak
C
Symbol
Parameter
Min
Max
Unit
tVDD
VDD rise time rate
20
∞
µs/V
VDD fall time rate
20
∞



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