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SY75604B bảng dữ liệu(PDF) 10 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  2/4 Outputs Ultra-Low Additive Jitter PCIe 1/2/3/4/5 Clock Buffer
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Trang chủ  http://www.microchip.com
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SY75602A/02B/603A/03B/604A/04B
DS20006508B-page 10
2021 Microchip Technology Inc. and its subsidiaries
3.0
PIN DESCRIPTIONS
All device inputs and outputs are LP-HCSL unless described otherwise. The Type column uses the following symbols:
• I: Input
• IPD: Input with 100 kΩ internal pull-down resistor
• O: Output
• P: Power supply
The descriptions of the pins are listed in Table 3-1 and Table 3-2.
TABLE 3-1:
SY75602A/02B PIN FUNCTION TABLE
Pin Number Pin Name
Type
Description
Input Reference
1
IN_p
I
Differential/Single Ended Input Reference
Input frequency range >0 Hz to 250 MHz.
Note 1: >0 Hz means frequency higher than DC. On the power up, the
device needs four clock cycles before the outputs get enabled. This feature
filters any initial glitch or runt pulse from the clock source.
Note 2: The differential input has hysteresis of 30 mV that prevents outputs
from randomly toggling when both p and n inputs are at the same voltage
level. For example, when p and n inputs are held low as in the case when
the buffer is driven from an HCSL driver that is disabled.
2
IN_n
Output Clocks
3
OUT0_p
O
Ultra-Low Additive Jitter Differential Outputs 0 and 1
Output frequency range >0 Hz to 250 MHz.
4
OUT0_n
6
OUT1_p
7
OUT1_n
Power and Ground
8
VDD
P
Positive Supply Voltage: Connect to either 3.3V, 2.5V, or 1.8V supply.
5
GND
P
Ground: Connect to ground.



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