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SY75602B bảng dữ liệu(PDF) 13 Page - Microchip Technology

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2021 Microchip Technology Inc. and its subsidiaries
DS20006508B-page 13
SY75602A/02B/603A/03B/604A/04B
4.3
Output Enable
Each output of SY75603A/03B/04A/04B has an active
low Output Enable (OExb) control pin. Output Enable
and Disable function is synchronous with the input
clock which results in glitchless transitions as shown in
Figure 4-5 and Figure 4-6. The OExb is sampled on the
falling edge of the differential input (or falling edge of
IN_p signal). It takes 3.5 clock cycles of the input clock
to enable an output and 4.5 clock cycles to disable the
output, after the change of OExb is sampled.
FIGURE 4-5:
OExb Assertion (Output
Enable) Timing Diagram.
FIGURE 4-6:
OExb Deassertion (Output
Disable) Timing Diagram.
IN_n
IN_p
IN_p - IN_n
OExb
OUTx_n
OUTx_p
I/O delay
IN_n
IN_p
IN_p - IN_n
OExb
OUTx_n
OUTx_p
I/O delay



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