công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

AS1130 bảng dữ liệu(PDF) 16 Page - ams AG

tên linh kiện AS1130
Giải thích chi tiết về linh kiện  132-LED Cross-Plexing Driver with Scrolling Function
PDF  66 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AMSCO [ams AG]
Trang chủ  http://www.ams.com
Logo AMSCO - ams AG

AS1130 bảng dữ liệu(HTML) 16 Page - ams AG

Back Button AS1130 Datasheet HTML 12Page - ams AG AS1130 Datasheet HTML 13Page - ams AG AS1130 Datasheet HTML 14Page - ams AG AS1130 Datasheet HTML 15Page - ams AG AS1130 Datasheet HTML 16Page - ams AG AS1130 Datasheet HTML 17Page - ams AG AS1130 Datasheet HTML 18Page - ams AG AS1130 Datasheet HTML 19Page - ams AG AS1130 Datasheet HTML 20Page - ams AG Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 66 page
background image
Page 16
ams Datasheet
Document Feedback
[v2-01] 2016-Oct-12
AS1130 − Detailed Description
Cross-Plexing Theorem
The cross-plexing theorem is using the fact that a LED has a
forward and backward direction. A LED will only glow if there
is a current flowing in forward direction. A parallel LED in
backward direction will block the current flow. This effect is
used in a cross-plexed matrix of LEDs.
Each CSx pin (CS0 to CS11) can be switched to VDD via the
internal current source (“high”), to GND (“low”) or not
connected (“highZ”).
The mode of operation which is controlled by an internal state
machine looks like following. CS0 is switched to GND and all
other CSx pins (CS1 to CS11) are controlled according to the
settings in the On/Off Frame and Blink & PWM registers (see
Figure 31).
Than CS1 is switched to GND and all other CSx pins (CS0 and
CS2 to CS11) are controlled according to the settings in the
On/Off Frame and Blink & PWM registers.
In this manner all LEDs in the matrix are scanned and turned
on/off depending on the register settings.
I²C Interface
The AS1130 supports the I²C serial bus and data transmission
protocol in fast mode at 1MHz. The AS1130 operates as a slave
on the I²C bus. The bus must be controlled by a master device
that generates the serial clock (SCLK), controls the bus access,
and generates the START and STOP conditions. Connections to
the bus are made via the open-drain I/O pins SCLK and SDA.
Figure 23:
I²C Interface Initialization
Detailed Description
19
81
9
8
1
0
AD2
10
AD1 AD0 R/W
D15 D14 D13 D12 D11 D10 D9
D8
AD2, AD1 and AD0 are defined by the pin ADDR, see I²C Device Address Byte.
SCLK
SDA



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com