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UT54ACS164245SWC bảng dữ liệu(PDF) 6 Page - Aeroflex Circuit Technology |
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UT54ACS164245SWC bảng dữ liệu(HTML) 6 Page - Aeroflex Circuit Technology |
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6 / 14 page ![]() 6 Notes: 1. All specifications valid for radiation dose ≤ 1E5 rad(Si) per MIL-STD-883, Method 1019. 2. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V IH = VIH (min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within th e above specified range, but are guaranteed to VIH (min) and VIL (max). 3. All combinations of OEx and DIRx 4. Per MIL-PRF-38535, for current density ≤ 5.0E5 amps/cm 2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF-MHz. 5. Guaranteed by characterization. 6. Not more than one output may be shorted at a time for maximum duration of one second. 7. Power does not include power contribution of any CMOS output sink current. 8. Power dissipation specified per switching output. 9.Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 1 0.Guaranteed; tested on a sample of pins per device. 11. Supplied as a design limit, but not guaranteed or tested. . P total1 Power dissipation 5,7, 8 C L = 50pF VDD from 4.5 to 5.5 2.0 mW/ MHz Ptotal2 Power dissipation 5, 7, 8 CL = 50pF V DD from 3.00 to 3.6 1.5 mW/ MHz IDD Standby Supply Current VDD1 or VDD2 Pre-Rad 25oC Pre-Rad -55oC to +125oC Post-Rad 25oC VIN = VDD or VSS V DD = 5 .5 OE=VDD OE=VDD OE=VDD 10 100 500 µA µA µA CIN Input capacitance 9 ƒ = 1MHz @ 0V VDD from 3.00 to 5.5 15 pF C OUT Output capacitance9 ƒ = 1MHz @ 0V V DD from 3.00 to 5.5 15 pF |
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