WM8580 datasheet(32/92 Pages) WOLFSON

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WM8580

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PP Rev 1.0 March 2006

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

7:0

MASTDA[7:0]

11111111

(0dB)

Digital Attenuation control for all DAC channels in 0.5dB steps. See

Table 23

R28

MASTER

DIGITAL

ATTENUATION

1Ch

UPDATE

Not latched

Controls simultaneous update of all Attenuation Latches

0 = Store gain in intermediate latch (no change to output)

1 = Apply gain and update attenuation on all channels.

Table 22 Digital Attenuation Registers

Note: The volume update circuit of the WM8580 has two sets of registers; LDAx and RDAx.

These can be accessed individually, or simultaneously by writing to MASTDA - Master

Digital Attenuation. Writing to MASTDA will overwrite the contents of LDAx and RDAx.

L/RDAx[7:0]

GAIN LEVEL

00(hex)

∞ dB (mute)

01(hex)

-127.5dB

FE(hex)

-0.5dB

FF(hex)

0dB

Table 23 Digital Volume Control Gain Levels

Setting the DACATC register bit causes the left channel attenuation settings to be applied to both left

and right channel DACs from the next audio input sample. No update to the attenuation registers is

required for DACATC to take effect.

BIT

LABEL

DEFAULT

DESCRIPTION

R19

DAC CONTROL 5

13h

DACATC

Attenuator Control

0 = All DACs use attenuations as

programmed.

1 = Right channel DACs use

corresponding left DAC attenuations

Table 24 DAC Attenuation Register (DACATC)

The digital volume control also incorporates a zero cross detect circuit which detects a transition

through the zero point before updating the digital volume control with the new volume. This

mechanism helps prevents pops and clicks during volume transitions, and is enabled by control bit

DZCEN.

BIT

LABEL

DEFAULT

DESCRIPTION

R19

DAC CONTROL 5

13h

DZCEN

DAC Digital Volume Zero Cross

Enable

0 = Zero Cross detect disabled

1 = Zero Cross detect enabled

Table 25 Digital Zero Cross Register

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