ZL40272 datasheet(13/54 Pages) MICROCHIP

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DS20006408B-page 13

ZL40272

FIGURE 2-7:

Input Driven by AC-Coupled LVDS for vcm_sel = 0 and 1.

FIGURE 2-8:

Input Driven by an SSTL Output for vcm_sel = 1.

2.2

Clock Outputs

Differential outputs LVPECL, LVDS, and HCSL should have same termination as corresponding outputs described in

previous section.

The device is designed to drive differential input of semiconductor devices. In applications that use a transformer to con-

vert from the differential to the single-ended output (for example, driving an oscilloscope 50Ω input), a resistor larger

than 10Ω should be added at the center tap of the primary winding to achieve optimum jitter performance as shown in

Figure 2-9. This is to provide a nominal common mode impedance of 10Ω or higher, which is typical for differential ter-

minations.

FIGURE 2-9:

Driving a Load via Transformer.

2.3

Crystal Oscillator Input

The crystal oscillator circuit can work with crystal resonators from 8 MHz to 160 MHz. To be able support crystal reso-

nators with different characteristics, all internal components are programmable.

The load capacitors can be programmed from 0 pF to 21.75 pF (4 pF default) with resolution of 0.25 pF, which not only

meets load requirement for most crystal resonator but also allows for fine tuning of the crystal resonator frequency. The

amplifier gain can be adjusted in five steps and series resistor can be adjusted as parallel combination of seven different

resistors: 0Ω, 10.5Ω, 21Ω, 42Ω, 84Ω, 161Ω, and 312Ω. (84Ω default) Although the first resistor is 0Ω, the series resis-

tance RS will be slightly higher than 0Ω due to parasitic resistance of the switch that connects to the resistor. Hence, the

minimum series resistance is achieved when all seven resistors are connected in parallel. The shunt resistor is fixed

and its value is 500 kΩ.

MSCC Device

100

Z0 = 50

LVDS

10 nF

VDD

RUP

RDWN

vcm_sel

1 k

590

3.3 k

RUP

RDWN

120

Z0 = 60

SSTL

MSCC Device

VDD

Z0 = 50

LVPECL

200

10 nF

200

VDD

24.9

Add resisto r to the grou nd or leave open

2 : 1

Z0 = 50

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