LTM4671 datasheet(11/36 Pages) AD

11 / 36 page

LTM4671

Rev. B

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FREQ0(F10),FREQ3(P8):SwitchingFrequencyProgram

Pin of Each 12A Switching Mode Regulator Channel. Fre-

quency is set internally to 600kHz. An external resistor can

be placed from this pin to GND to increase frequency, or

from this pin to INTVCC to reduce frequency. See the Ap-

plications Information section for frequency adjustment.

VOSNS0+ (G8), VOSNS3+ (N11): Positive Input to the Dif-

ferential Remote Sense Amplifier of Each 12A Switching

Mode Regulator Channel. Internally, this pin is connected

to VFB with a 60.4k 0.5% precision resistor. See the Ap-

plications Information section for details.

VOSNS0– (F8), VOSNS3– (P10): Negative Input to the

Differential Remote Sense Amplifier of Each 12A Switch-

ing Mode Regulator Channel. Connect an external resistor

between FB and VOSNS– pin to set the output voltage of

the specific channel. See the Applications Information

section for details.

MODE/CLKIN0 (G11), MODE/CLKIN3 (R8): Discontinu-

ous Mode Select Pin and External Synchronization Input

to Phase Detector of Each 12A Switching Mode Regula-

tor Channel. Tie MODE/CLKIN to GND for discontinuous

mode of operation. Floating MODE/CLKIN or tying it to

a voltage above 1V will select forced continuous mode.

Furthermore,connectingMODE/CLKINtoanexternalclock

will synchronize the system clock to the external clock and

puts the part in forced continuous mode. See Applications

Information section for details.

CLKOUT0 (E10), CLKOUT3 (P6): Output Clock Signal for

PolyPhaseOperationofEach12ASwitchingModeRegula-

tor Channel. The phase of CLKOUT with respect to CLKIN

is determined by the state of the respective PHMODE pin.

CLKOUT’s peak-to-peak amplitude is INTVCC to GND. See

Applications Information section for details.

PHMODE0 (E6), PHMODE3 (R6): Control Input to the

Phase Selector of Each 12A Switching Mode Regulator

Channel. Determines the phase relationship between in-

ternal oscillator and CLKOUT. Tie it to INTVCC for 2-phase

operation, tie it to SGND for 3-phase operation, and float-

ing for 4-phase operation. See Applications Information

section for details.

TSENSE0+ (A7), TSENSE3+ (W6): Temperature Monitor

of Each 12A Switching Mode Regulator Channel. An in-

ternal diode connected PNP transistor is placed between

TSENSE+ and TSENSE– pins. See the Applications Infor-

mation section.

TSENSE0– (A6), TSENSE3– (W7): Low Side of the Internal

Temperature Monitor.

SVIN0 (E9), SVIN3 (R9): Signal VIN. Filtered input voltage

to the on-chip 3.3V regulator. Tie this pin to the VIN pin in

most applications or connect SVIN to an external voltage

supply of at least 4V which must also be greater than VOUT.

PINS FOR DUAL 5A CHANNELS:

VOUT1 (H1-H4, J1-J4), VOUT2 (L1-L4, M1-M4): Power

OutputPinsofEach5ASwitchingModeRegulatorChannel.

Apply output load between these pins and GND pins. Rec-

ommend placing output decoupling capacitance directly

between these pins and GND pins. See the Applications

Information section for paralleling outputs.

PGOOD1 (H8), PGOOD2 (M8): Output Power Good with

Open-Drain Logic of Each 5A Switching Mode Regulator

Channel. PGOOD is pulled to ground when the voltage on

theFBpinisnotwithin±10%oftheinternal0.6Vreference.

INTVCC12 (K9): Internal 3.3V Regulator Output for Both 5A

Switching Mode Regulator Channels. The internal power

drivers and control circuits are powered from this voltage.

Decouple each pin to GND with a minimum of 2.2µF local

low ESR ceramic capacitor.

RUN1 (J8), RUN2 (L8): Run Control Input of Each 5A

Switching Mode Regulator Channel. Enable regulator

operation by tying the specific RUN pin above 1.2V. Tying

it below 1.1V shuts down the specific regulator channel.

COMP1 (J11), COMP2 (M11): Current Control Threshold

andErrorAmplifierCompensationPointofEach5ASwitch-

ingModeRegulatorChannel.Theinternalcurrentcompara-

tor threshold is linearly proportional to this voltage. Tie the

COMP pins from different channels together for parallel

operation. These channels are internally compensated.

PIN FUNCTIONS

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