Detailed description

STSPIN840

14/28

DocID031835 Rev 1

PARALLEL mode

The device can operate in parallel mode by forcing the PARALLEL input pin high.

In this operation mode both the full bridges are driven by the ENA, PWMA and PHA inputs.

The PWM current control comparator of the bridge B is disabled, and bridge A one drives

both the power stages.

The resulting single full-bridge power stage allows an increase in the output current

capability and reduce the device power dissipation. The outputs and sense pins

configuration must be:



OUT1A connected with OUT1B



OUT2A connected with OUT2B



All SENSE and SNS pins connected together as shown in Figure 5.

The ENA\FAULTA pin is also used as FAULT indication through the integrated open-drain

MOSFETs as described in Section 5.4 and Section 5.4.3 on page 21.

Note:

In parallel mode the ENB\FAULTB pin is forced low.

Figure 5. PARALLEL mode typical application