ES9038Q2M datasheet(64/65 Pages) ESS

64 / 65 page

CONFIDENTIAL Rev. 1.3

July 17, 2019

ES9038Q2M Datasheet

ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-

8800 • Fax (408) 643-8801

ORDERING INFORMATION

Part Number

Description

Package

ES9038Q2M

Sabre32 Reference 32-Bit, 2-Channel, Low Power Audio

DAC

30-pin QFN

The letter Q identifies the package type QFN

Revision History

Rev.

Date

Notes

0.2

April 26, 2016

Correct package drawing

0.3

May 5, 2016

Update chip and system block diagrams

Update master mode diagram

Update power up sequence diagram

0.4

June 14, 2016

Correct master_div ratios

Update automute description

Update 128fs mode description

Update relationship among XI, MCLK and Clock Gearing

Clarify I2C does not support multibyte read

Update Analog Performance table

Update dpll_num description

Update charge pump clock description

Update lock_speed description

Update volume ramp rate

Update part number in header and block diagrams

0.5

July 18, 2016

General updates

Update functional description

Update I2C hold time

Update Analog Performance table

Update power consumption

0.6

August 4, 2016

Add headphone control description

Change hyperlink color

General update

0.61

August 10, 2016

Update power consumption

0.63

September 6, 2017

Updated Register 14 [7]

0.7

September 22, 2017

Updated Register 27 [3]

0.8

October 18, 2017

Updated Register 8 GPIO listing, updated error on Pin Layout

0.9

November 28, 2017

Remove ESS logo from pin diagram.

1.0

November 15, 2018

Added Low Power Audio DAC description, removed Advanced Information.

1.1

February 28, 2019

Updated block diagram

1.2

May 9, 2019

Correct Register 13 [6] for default THD compensation

1.3

July 17, 2019

Updated performance number

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