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DMA2286 bảng dữ liệu(PDF) 5 Page - Micronas |
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DMA2286 bảng dữ liệu(HTML) 5 Page - Micronas |
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5 / 48 page ![]() DMA 2275, DMA 2286 5 2. Chip Architecture Figure 2–1 shows the architecture of the descrambling chip DMA 2286. The DMA 2275 architecture is identical to the that of the DMA 2286, except that the sound pro- cessor is missing. The chips can be subdivided into sev- eral functional blocks. DMA 2275 and DMA 2286: Video Processor – descrambling, panning and interpolation of the video signal PRBS Generator – delivers cut points and cipher streams Line 625 Processor – acquisition of service identification data and real time control information Packet Processor – acquisition of entitlement packets, acquisition of gen- eral purpose packets, selection of cipher stream, des- crambling of data packets Interface Processor – management of internal and external data transfer Timing Generator – delivers internal chip timing DMA 2286 only: Sound Processor – spectrum descrambling of data burst, packet deinter- leaving (one subframe only), sound packet processing (one subframe only) Line 625 Proc. 3 Vdd Vdd GND GND Fig. 2–1: Block diagram of the DMA 2286 PRBS Generator Video Processor Interface Processor Timing Generator Sound Proc. Packet Processor Code Converter Video Descrambler Interpolation Filter Clamping + Video Gate Video PRBS Generator Packet PRBS Generator Fast Processor IM Bus Interface DRAM Interface Timing Generator Packet Acquisition Line 625 Acquisition Packet Descrambler Spectr. Descr. Deinterleaver Sound Processing Baseband 88 8 8 Burst Data 12 2 Packet Data Descrambl. Packet Data Corrected Packet Data VBI Data Baseband 8 8 8 |
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