EDB8164B4PR-1DITF-R datasheet(121/152 Pages) MICRON

tên linh kiện	EDB8164B4PR-1DITF-R

Giải thích chi tiết về linh kiện	216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Features

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Figure 79: HSUL_12 Driver Output Reference Load for Timing and Slew Rate

LPDDR2

REF

0.5 × V

DDQ

Output

LOAD = 5pF

TT = 0.5 × VDDQ

Note:

1. All output timing parameter values (tDQSCK, tDQSQ, tQHS, tHZ, tRPRE etc.) are reported

with respect to this reference load. This reference load is also used to report slew rate.

Output Driver Impedance

Output driver impedance is selected by a mode register during initialization. To achieve

tighter tolerances, ZQ calibration is required. Output specifications refer to the default

output drive unless specifically stated otherwise. The output driver impedance RON is

defined by the value of the external reference resistor RZQ as follows:

RONPU =

VDDQ - VOUT

ABS(IOUT)

When RONPD is turned off.

RONPD =

VOUT

When RONPU is turned off.

ABS(IOUT)

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

Output Driver Impedance

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

121

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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