ML2215 datasheet(4/26 Pages) OKI

4 / 26 page

FEDL2215-01

1Semiconductor

ML2215

4/26

PIN DESCRIPTIONS

Symbol

Type

Description

17 (19)

RESET

“L” input to this pin turns the LSI into standby mode. At this point, output from

the AOUT pin rises up to V

DD level, having the LSl initialized internally. By “H”

input to the pin the AOUT output returns to 1/2 V

DD level.

2 (4)

NAR

This pin outputs a signal showing empty/full status of the Phase Address

Latch Resister. “H” level indicates the register is empty, and thus the LSI is

ready to accept serial data input. At powering up, the pin outputs “H level”.

3 (5)

BUSY

Output “L” level while output signal is present either at the AOUT or MD pin.

At powering up, the pin outputs “H” level.

4 (6)

Music output pin

7 (7)

REF

DAC reference pin. Leave this pin open when not used.

9 (9)

AOUT

Analog output pin

8 (8)

GND

—

Ground pin

12 (16)

CLK

External clock input pin

18 (20)

Serial clock input pin

19 (21)

Serial data input pin. Input a phrase code corresponding to a phrase address

through this pin.

13 (17)

This pin is used when 3-pin interfacing is selected. When 3-pin inter-facing is

selected, input to the SD and Sl pins is valid while the

ST pin being held “L”.

When this pin is at “H” level, speech synthesis is started. When 2-pin

interfacing is selected, connect this pin to GND. Mask option allows the user

to select either 3-pin interfacing or 2-pin interfacing.

11 (15)

—

Power supply pin. Insert 0.1

µF or larger bypass capacitor between this pin

and the GND pin.

* 20-pin plastic SSOP (24-pin plastic SOP)

ML2215 bảng dữ liệu(PDF) 4 Page - OKI electronic componets

ML2215 bảng dữ liệu(HTML) 4 Page - OKI electronic componets

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

bảng dữ liệu tải về

Link URL