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LTC2995 bảng dữ liệu(PDF) 11 Page - Analog Devices |
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LTC2995 bảng dữ liệu(HTML) 11 Page - Analog Devices |
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11 / 90 page ![]() LTM2985 11 Rev. 0 For more information www.analog.com PIN FUNCTIONS Logic Side DOUT (B1): Digital Output, Referenced to VL and GND. Logic output connected to DIN through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. SDO (A2): Serial SPI Digital Output, Referenced to VL and GND. Under the condition of an isolation communication failure this output is in a high impedance state. SCK (A3): Serial SPI Clock Input, Referenced to VL and GND. Do not float. SDI (A4): Serial SPI Data Input, Referenced to VL and GND. Do not float. CS (A5): Serial SPI Chip Select, Referenced to VL and GND. Do not float. SDOE (A6): Serial SPI Data Output Enable, Referenced to VL and GND. A logic high on SDOE places the logic side SDO pin in a high impedance state, a logic low enables the output. Do not float. For multiple SPI devices on the same bus connect SDOE to CS, otherwise tie to GND. ON (A7): Enable. Enables power and data communica- tion through the isolation barrier. If ON is high, the part is enabled and power and communications are functional to the isolated side. If ON is low, the logic side is held in reset, all digital outputs are in a high impedance state and the isolated side is unpowered. Do not float. VL (A8, B8): Logic Supply. Interface supply voltage for pins SDI, SCK, SDO, DOUT, CS, SDOE and ON. Operating voltage is 1.62V to 5.5V. Internally bypassed with 2.2μF to GND. GND (A9, B2 to B7, B9, C1 to C11 ): Circuit Ground. VCC(A10,A11,B10,B11):IsolatedAnalogPowerSupply. Internally bypassed with 2.2μF to GND. DNC (A1): Do Not Connect. Pin connected internally. Isolated Side VCC2(R11):5VNominalIsolatedSupplyVoltage.Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed with 2.2μF to GND2. DIN (T3): Digital Input, Referenced to VCC2 and GND2. Logic input connected to DOUT through isolation barrier. The logic state on DIN translates to the same logic state on DOUT (Do not float). INT (T2): Interrupt. Transitions from LOW to HIGH once the conversion is complete. Can be sent to logic side by shorting to DIN. GND2 (R8, S6, S8, R10, R3, S3, T1): Isolated Ground. VREF (S11): Reference output pin. Internally bypassed with 10µF to GND. Do not load this pin. DNC (R1, R2, R9,S1, S2, S9, S10, T8, T9, T10, T11): Do Not Connect. Pin connected internally. CH1–CH10 (R7, R6, R5, R4, S4, T4, T5, T6, T7, S7 ): Analog Inputs. May be programmed for single-ended, differential, or ratio-metric operation. The voltage on these pins can have any value between GND2 – 50mV and VCC2 – 0.3V. Unused pins can be grounded or left floating. COM (S5): Common input, this is the negative input pin for all single ended operations. |
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