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SH7041A bảng dữ liệu(PDF) 175 Page - Renesas Technology Corp

tên linh kiện SH7041A
Giải thích chi tiết về linh kiện  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A bảng dữ liệu(HTML) 175 Page - Renesas Technology Corp

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• Bits 11–10—DTC Mode 1, 0 (MD1, MD0): These bits designate the DTC transfer mode.
Bit 11 (MD1)
Bit 10 (MD0)
Description
0
0
Normal mode
0
1
Repeat mode
1
0
Block transfer mode
1
1
Reserved (setting prohibited)
• Bits 9–8—DTC Data Transfer Size 1, 0 (SZ1, SZ0): These bits designate the data size for data
transfers.
Bit 9 (SZ1)
Bit 8 (SZ0)
Description
0
0
Byte (8 bits)
0
1
Word (16 bits)
1
0
Longword (32 bits)
1
1
Reserved (setting prohibited)
• Bit 7—DTC Transfer Mode Select (DTS): When in repeat mode or block transfer mode, this
bit designates whether the source side or destination side will be the repeat area or block area.
Bit 7 (DTS)
Description
0
Destination side is the repeat area or block area
1
Source side is the repeat area or block area
• Bit 6—DTC Chain Enable (CHNE): This bit designates whether to perform continuous DTC
data transfers with the same activating source. Continued transfer information is read after the
16th byte from the start address of the previous transfer information.
Bit 6 (CHNE)
Description
0
DTC data transfer end (activation wait state ensues)
1
DTC data transfer continue (read continue register information, execute
transfer)



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