SH7041A datasheet(365/923 Pages) RENESAS

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Periodic Counter Operation Example: Periodic counter operation is obtained for a given

channel’s TCNT by selecting compare-match as a TCNT clear source. Set the TGR register for

period setting to output compare register and select counter clear upon compare-match using the

CCLR2–CCLR0 bits of the timer control register (TCR). After these settings, the TCNT begins

incrementing as a periodic counter when the corresponding bit of TSTR is set to 1. When the

count matches the TGR register value, the TGF bit in the TSR is set to 1 and the counter is cleared

to H'0000. If the TGIE bit of the corresponding TIER is set to 1 at this point, the MTU will make

an interrupt request to the interrupt controller. After the compare-match, TCNT continues counting

from H'0000. Figure 12.9 shows an example of periodic counting.

CST bit

TCNT value

Time

Counter cleared by

TGR compare match

TGR

H'0000

TGF

Flag cleared by software

or DTC/DMAC activation

Figure 12.9 Periodic Counter Operation

Compare-Match Waveform Output Function: The MTU can output 0 level, 1 level, or toggle

output from the corresponding output pins upon compare-matches.

Procedure for selecting the compare-match waveform output operation (figure 12.10):

1.Set the TIOR to select 0 output or 1 output for the initial value, and 0 output, 1 output, or

toggle output for compare-match output. The TIOC pin will output the set initial value until the

first compare-match occurs.

2.Set a value in the TGR to select the compare-match timing.

3.Set the CST bit in the TSTR to 1 to start counting.

SH7041A bảng dữ liệu(PDF) 365 Page - Renesas Technology Corp