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ADE9153A bảng dữ liệu(PDF) 49 Page - Analog Devices

tên linh kiện ADE9153A
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ADE9153A bảng dữ liệu(HTML) 49 Page - Analog Devices

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Data Sheet
ADE9153A
Rev. 0 | Page 49 of 50
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
0x4C1
EVENT_STATUS
[15:6]
Reserved
Reserved.
0x0
R
5
OIB
This bit is set when Current
Channel B is in an
overcurrent condition and is
zero when it is not in an
overcurrent condition.
0x0
R
4
OIA
This bit is set when Current
Channel A is in an
overcurrent condition and is
zero when it is not in an
overcurrent condition.
0x0
R
3
Reserved
Reserved.
0x0
R
2
SWELLA
This bit is set when the
voltage channel is in a swell
condition and is zero when
it is not in a swell condition.
0x0
R
1
Reserved
Reserved.
0x0
R
0
DIPA
This bit is set when the
voltage channel is in the dip
condition and is zero when
it is not in a dip condition.
0x0
R
0x4C2
CHIP_STATUS
[15:8]
Reserved
Reserved.
0x0
R
7
UART_RESET
When this bit is set, a UART
interface reset is detected.
0x0
R
6
UART_ERROR2
Reset the UART interface to
clear this error.
0x0
R
5
UART_ERROR1
Reset the UART interface to
clear this error.
0x0
R
4
UART_ERROR0
Reset the UART interface to
clear this error.
0x0
R
3
ERROR3
Issue a software reset or
hardware reset to clear this
error.
0x0
R
2
ERROR2
Issue a software reset or
hardware reset to clear this
error.
0x0
R
1
ERROR1
Issue a software reset or
hardware reset to clear this
error.
0x0
R
0
ERROR0
Issue a software reset or
hardware reset to clear this
error.
0x0
R



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