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Z87C33 bảng dữ liệu(PDF) 21 Page - Zilog, Inc. |
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Z87C33 bảng dữ liệu(HTML) 21 Page - Zilog, Inc. |
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21 / 72 page ![]() PS015601-1003 Z87C33 CMOS Z8“ MCU Consumer Controller Processor 15 Register E0h-EFh is only accessed via working register and indirect addressing modes. Stack Pointer. The internal register file is used for the stack. An 8-bit Stack Pointer (SPL) is used for the internal stack that resides within the 236 general-purpose registers. Stack Pointer High (SPH) is used as a general-purpose register. SPH and SPL are set to 00h after any RESET or Stop-Mode Recovery. Counter/Timers. There are two 8-bit programmable counter/timers (T0–T1), each driven by its own 6-bit programmable prescaler. The T1 prescaler is driven by internal or external clock sources; however, the T0 prescaler is driven by the inter- nal clock only (Figure 10). The 6-bit prescalers can divide the input frequency of the clock source by any integer number from 1 to 64. Each prescaler drives its counter, which decrements the value (1 to 256) that is loaded into the counter. When the counter reaches the end of the count, a timer interrupt request, IRQ4 (T0) or IRQ5 (T1), is generated. The counters are programmed to START, STOP, restart to CONTINUE, or restart from the initial value. The counters can also be programmed to STOP upon reach- ing 0 (SINGLE-PASS mode) or to automatically reload the initial value and con- tinue counting (MODULO–N CONTINUOUS mode). The counters, but not the prescalers, are read at any time without disturbing their value or count mode. The clock source for T1 is user-definable and is either the internal microprocessor clock divide-by-four, or an external signal input through Port 3. The Timer Mode Register configures the external timer input (P31) as an external clock, a trigger input that is retriggerable or nonretriggerable, or as a gate input for the internal clock. The counter/timers are cascaded by connecting the T0 output to the input of T1. TIN mode is enabled by setting PRE1 bit D1 to 0. Note: Note: |
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