ZLR64400ROMMCU datasheet(21/155 Pages) ZILOG

21 / 155 page

PS024502-1205

P R E L I M I N A R Y

I/O Port Pin Functions

ZLR64400 ROM MCU

Product Specification

I/O Port Pin Functions

The ZLR64400 MCU features three 8-bit ports, which are described below.

Port 0 is nibble-programmable as either input or output

Port 2 is bit-programmable as either input or output

Port 3 features four inputs on the lower nibble and four outputs on the upper nibble

Port 0 and 2 internal pull-ups are disabled on any pin or group of pins when programmed

into output mode.

The CMOS input buffer for each port 0 or 2 pin is always connected to the pin, even

when the pin is configured as an output. If the pin is configured as an open-drain output

and no external signal is applied, a High output state can cause the CMOS input buffer

to float. This might lead to excessive leakage current of more than 100 A. To prevent

this leakage, connect the pin to an external signal with a defined logic level or ensure its

output state is Low, especially during STOP mode.

Port 0, 1, and 2 have both input and output capability. The input logic is always present

no matter whether the port is configured as input or output. When doing a READ in-

struction, the MCU reads the actual value at the input logic but not from the output buff-

er. In addition, the instructions of OR, AND, and XOR have the Read-Modify-Write

sequence. The MCU first reads the port, and then modifies the value and load back to

the port.

Precaution must be taken if the port is configured as open-drain output or if the port is

driving any circuit that makes the voltage different from the desired output logic. For

example, pins P00P07 are not connected to anything else. If it is configured as open-

drain output with output logic as ONE, it is a floating port and reads back as ZERO. The

following instruction sets P00P07 all LOW.

ßÒÜ ÐðôýûÚð

Table 7 summarizes the registers used to control I/O ports. Some port pin functions can

also be affected by control registers for other peripheral functions.

Table 7. I/O Port Control Registers

Address (Hex)

Reset

12-Bit

Bank 8-Bit

Mnemonic

Page #

00003

Port 0

XXh

00203

Port 2

XXh

Notes:

Caution:

ZLR64400ROMMCU bảng dữ liệu(PDF) 21 Page - Zilog, Inc.

ZLR64400ROMMCU bảng dữ liệu(HTML) 21 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL