SST26VF040A-80ISLASHMFVAO datasheet(30/73 Pages) MICROCHIP

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DS20006292B-page 30

SST26VF040A

5.20

Page Program

The Page Program instruction programs up to

256 bytes of data in the memory, and supports both SPI

and SQI protocols. The data for the selected page

address must be in the erased state (FFH) before

initiating the Page Program operation. A Page Program

applied to a protected memory area will be ignored.

Prior to the program operation, execute the WREN

instruction.

To execute a Page Program operation, the host drives

CE# low then sends the Page Program command cycle

(02H), three address cycles followed by the data to be

programmed, then drives CE# high. The programmed

data must be between 1 to 256 bytes and in whole-byte

increments; sending less than a full byte will cause the

partial byte to be ignored. Poll the BUSY bit in the

STATUS register, or wait TPP for the completion of the

internal, self-timed, write operation. See Figures 5-27

and 5-28 for the Page Program sequence.

When executing Page Program, the memory range for

the SST26VF040A is divided into 256-byte page

boundaries. The device handles shifting of more than

256 bytes of data by maintaining the last 256 bytes of

data as the correct data to be programmed. If the target

address for the Page Program instruction is not the

beginning of the page boundary (A[7:0] are not all

zero), and the number of bytes of data input exceeds or

overlaps the end of the address of the page boundary,

the excess data inputs wrap-around and will be

programmed at the start of that target page.

FIGURE 5-27:

PAGE-PROGRAM SEQUENCE (SQI)

FIGURE 5-28:

PAGE-PROGRAM SEQUENCE (SPI)

MODE 3

SCK

SIO[3:0]

CE#

C1 C0

MODE 0

A5 A4

MSN LSN

A3 A2

A1 A0

H0 L0

H1 L1

H2 L2

HN LN

Data Byte 0 Data Byte 1 Data Byte 2

Data Byte 255

Note:

MSN = Most Significant Nibble, LSN = Least Significant Nibble

CE#

SCK

ADD.

0 1 234 5 6 78

ADD.

Data Byte 0

High-Impedance

15 16

23 24

31 32

MODE 0

MODE 3

MSB

LSB

CE#(cont’)

SO(cont’)

SI(cont’)

SCK(cont’)

40 41 42 43 44 45 46

47 48

Data Byte 1

High-Impedance

MSB

LSB

50 51 52 53 54 55

Data Byte 2

Data Byte 255

LSB

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