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USB4712 bảng dữ liệu(PDF) 12 Page - Microchip Technology

tên linh kiện USB4712
Giải thích chi tiết về linh kiện  USB 2.0 Hi-Speed Retimer Hub Family with Auto-FlexConnect Capability
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nhà sản xuất  MICROCHIP [Microchip Technology]
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USB4712 bảng dữ liệu(HTML) 12 Page - Microchip Technology

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USB4712
DS00002774G-page 12
 2018-2021 Microchip Technology Inc.
Note 3-1
Configuration strap values are latched on Power-On Reset (POR) and the rising edge of RESET_N
(external chip reset). Configuration straps are identified by an underlined symbol name. Signals that
function as configuration straps must be augmented with an external resistor when connected to a
load. For additional information, refer to Section 3.3, "Configuration Straps and Programmable
Functions".
Test 1
TEST1
A
Test 1 pin.
This signal is used for test purposes and must always be
pulled-up to resistor (4.7 kOhm recommended).
Test 2
TEST2
A
Test 2 pin.
This signal is used for test purposes and may be pulled
up to 3.3V or pulled-down to ground via a resistor
(4.7kOhm recommended).
Test 3
TEST3
A
Test 3 pin.
This signal is used for test purposes and may be pulled
up to 3.3V or pulled-down to ground via a resistor
(4.7kOhm recommended).
No Connect
NC
-
No Connect.
This pin should be left unconnected for proper operation.
Flex Command
FLEX_CMD
I
Flex Command (USB4712PF Only)
Controls state of FlexConnect.
0 = Not Flexed (Port 0 is UFP)
1 = Flexed (Port 1 is UFP)
Configuration Straps
Non-Removable
Port
Configuration
Strap
CFG_NON_REM
I
Non-Removable Ports Configuration Strap.
This configuration strap controls selection of the non-
removable port. See Note 3-1.
Battery Charging
Configuration
Strap
CFG_BC_EN
I
Battery Charging Configuration Strap.
This configuration strap controls the BC 1.2 enabling on
the downstream port. See Note 3-1.
Power/Ground
+3.3V I/O Power
Supply Input
VDDIO33
P
+3.3V I/O power supply input.
+3.3V Analog
Power Supply
Input
VDDPLLREF33
P
+3.3V master bias / PLL regulator supply input.
+1.2V Core Power
Supply Output
VDDCR12
P
+1.2V digital core power supply output.
Note:
This signal requires connection of a 1uF low-
ESR capacitor to ground.
Ground
VSS
P
Ground pins.
TABLE 3-2:
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Description



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