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ICS853111 bảng dữ liệu(PDF) 7 Page - Integrated Circuit Systems |
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ICS853111 bảng dữ liệu(HTML) 7 Page - Integrated Circuit Systems |
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7 / 13 page ![]() 853111AY www.icst.com/products/hiperclocks.html REV. D JULY 22, 2003 7 Integrated Circuit Systems, Inc. ICS853111 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER PRELIMINARY FIGURE 2A. SINGLE ENDED LVCMOS SIGNAL DRIVING DIFFERENTIAL INPUT Figure 2A shows an example of the differential input that can be wired to accept single ended LVCMOS levels. The reference voltage level V BB generated from the device is connected to APPLICATION INFORMATION WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVCMOS LEVELS the negative input. The C1 capacitor should be located as close as possible to the input pin. FIGURE 2B. SINGLE ENDED LVPECL SIGNAL DRIVING DIFFERENTIAL INPUT Figure 2B shows an example of the differential input that can be wired to accept single ended LVPECL levels. The reference voltage level V BB generated from the device is connected to the negative input. The C1 capacitor should be located as close as possible to the input pin. WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVPECL LEVELS CLK_IN C1 0.1uF VDD(or VCC) + - VBB VCC R2 1K V_REF C1 0.1u R1 1K Single Ended Clock Input PCLK nPCLK |
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