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ICS853001AM bảng dữ liệu(PDF) 7 Page - Integrated Circuit Systems |
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ICS853001AM bảng dữ liệu(HTML) 7 Page - Integrated Circuit Systems |
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7 / 16 page ![]() 853001AG www.icst.com/products/hiperclocks.html REV. A JANUARY 29, 2005 7 Integrated Circuit Systems, Inc. ICS853001 1:1, DIFFERENTIAL LVPECL-TO- 2.5V, 3.3V, 5V LVPECL/ECL BUFFER APPLICATION INFORMATION FIGURE 1A. SINGLE ENDED LVCMOS SIGNAL DRIVING DIFFERENTIAL INPUT Figure 1A shows an example of the differential input that can be wired to accept single ended LVCMOS levels. The reference voltage level V BB generated from the device is connected to WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVCMOS LEVELS the negative input. The C1 capacitor should be located as close as possible to the input pin. FIGURE 1B. SINGLE ENDED LVPECL SIGNAL DRIVING DIFFERENTIAL INPUT Figure 1B shows an example of the differential input that can be wired to accept single ended LVPECL levels. The reference voltage level V BB generated from the device is connected to the negative input. WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVPECL LEVELS VCC R2 1K V_REF C1 0.1u R1 1K Single Ended Clock Input PCLK nPCLK PCLK nPCLK VBB C1 0.1u CLK_IN VCC |
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