TSOP7000SW1 datasheet(5/8 Pages) VAISH

5 / 8 page

TSOP7000SW1

Document Number 82221

Rev. 1.1, 01-Mar-05

Vishay Semiconductors

www.vishay.com

Recommendation for Suitable Data For-

mats

The circuit of the TSOP7000SW1 is designed in that

way that disturbance signals are identified and unwa-

ted output pulses due to noise or disturbances are

avoided. A bandpass filter, an automatic gain control

and an integrator stage is used to suppress such dis-

turbances. The distinguishing marks between data

signal and disturbance are carrier frequency, burst

length and the envelope duty cycle.

The data signal should fullfill the following conditions:

• The carrier frequency should be close to 455 kHz.

• The burstlength should be at least 22

µs (10 cycles

of the carrier signal) and shorter than 500

µs.

• The separation time between two consecutive

bursts should be at least 26

µs.

• If the data bursts are longer than 500

µs then the

envelope duty cycle is limited to 25 %

• The duty cycle of the carrier signal (455 kHz) may be

between 50 % (1.1

µs pulses) and 10 % (0.2 µs

pulses). The lower duty cycle may help to save bat-

tery power.

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